View MR27V1641L_7554320.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

fedr27v1641l-002-04 issue date: apr. 1, 2009 MR27V1641L 16m?word 1?bit serial production programmed rom (p2rom) 1/15 general description the MR27V1641L is a 16 mbit production programmed read-only memory, which is configured as 16,777,216 word 1-bit. the MR27V1641L supports a simple read operation using a single 3.3v power supply and a serial peripheral interface (spi) compatible serial bus. the MR27V1641L have data programmed and have functions tested at lapis semiconductor factory. (using the dc pins for the programming function is not allowed.) features pin configuration ( top view ) 16,7 77,216-word 1-bit configuration +3.0 v to 3.6 v power supply access time 33 mhz serial clock (fast-read) 20 mhz serial clock (read) read identification instruction active read current 25 ma max (fast-read) 20 ma max (read) standby current 50 a max serial clock input and data input/output input data format 1-byte command code, 3-byte address, 1-byte dummy (fast-read) 1-byte command code, 3-byte address (read) packages MR27V1641L-xxxmp 16-pin plastic sop (p-sop16-375-1.27-k) pin descriptions pin name functions #cs chip select si serial data input so serial data output sclk clock input v cc power supply voltage v ss ground dc don?t care ( 0v - vcc ) program power supply voltage vpp under programming operation nc no connection 16sop 16 15 14 13 12 11 10 9 nc v cc nc dc nc nc #cs so sclk 1 si 2 nc 3 nc 4 nc 5 nc 6 v ss 7 nc 8
fedr27v1641l-002-04 MR27V1641L / p2rom read command definition command read array (byte) note 1st 03[h] 1 2nd ad1 2 3rd ad2 2 4th ad3 2 action n byte read out until #cs goes high 3 note: 1. the 1 st command 03[h] is a read command 2. ad1 to ad3 are address input data 3. data output details of command are shown as follows. 1-byte command code read: 0 0 0 0 0 0 1 1 3-byte address ad1: x x x a20 a19 a18 a17 a16 ad2: a15 a14 a13 a12 a11 a10 a9 a8 ad3: a7 a6 a5 a4 a3 a2 a1 a0 note: x: dummy bit 2/ 15
fedr27v1641l-002-04 MR27V1641L / p2rom fast-read command definition command read array (byte) note 1st 0b[h] 1 2nd ad1 2 3rd ad2 2 4th ad3 2 5th x 3 action n byte read out until #cs goes high 4 note: 1. the 1 st command 0b[h] is a read command 2. ad1 to ad3 are address input data 3. x is a dummy cycle 4. data output details of command are shown as follows. 1-byte command code fast-read: 0 0 0 0 1 0 1 1 3-byte address ad1: x x x a20 a19 a18 a17 a16 ad2: a15 a14 a13 a12 a11 a10 a9 a8 ad3: a7 a6 a5 a4 a3 a2 a1 a0 note: x: dummy bit 3/ 15
fedr27v1641l-002-04 MR27V1641L / p2rom read identification command definition command read array (byte) note 1 st 9f[h] 1 action 3 byte read out 2 note: 1. the 1 st command 9f[h] is a read identification command 2. identification output details of command are shown as follows. 1-byte command code rdid 1 0 0 1 1 1 1 1 identification definition device identification manufacturer identification type capacity ae[h] 41[h] 13[h] 4/ 15
fedr27v1641l-002-04 MR27V1641L / p2rom device operation 1. command ?03h? or ?0bh? makes this lsi become and keep active mode until next #cs high. 2. incorrect command makes this lsi become and keep standby mode until next #cs low. in standby mode, so pin is high-z. 3. at power-up, the device must not be selected (that is #cs must follow the voltage applied on vcc) until vcc reaches the operating value. command description 1. read array this command consists of the 4-byte code. the 1 st code is a command which decides if the device becomes standby or active mode. the 1 st code ?03h?activates the device. the 2 nd code to the 4 th code are address. 2. fast-read array this command consists of the 5-byte code. the 1 st code is a command which decides if the device becomes standby or active mode. the 1 st code ?0bh?activates the device. the 2 nd code to the 4 th code are address. the 5 th code is a dummy cycle. 3. read identification array this command consists of the 1-byte code. the 1 st code is a command which decides if the device becomes standby or active mode. the 1 st code ?9fh?activates the device. 4. standby when #cs is high , the device is put in standby mode at the next rising edge of sclk. maximum standby current is 50ua. when the above-mentioned 1 st code is incorrect command , the device is put in standby mode at the next rising edge of sclk. data sequence the data is serially sent out through so pin, synchronized with the falling edge of sclk. meanwhile input data is also serially read in through si pin, synchronized with the rising edge of sclk. the bit sequence for both input and output data are bit7 (msb) first, bit6, bit5, ?, and bit0(lsb). address sequence the address assignment is described at the command definition on page 2 or 3. 5/ 15
fedr27v1641l-002-04 MR27V1641L / p2rom absolute maximum ratings parameter symbol condition value unit storage temperature tstg ? ?55 to 125 c input voltage v i ?0.5 to v cc +0.5 v output voltage v o ?0.5 to v cc +0.5 v power supply voltage v cc relative to v ss ?0.5 to 5 v power dissipation per package p d ta = 25c 1.0 w output short circuit current i os ? 10 ma recommended operating conditions (ta = 0 to 70c) parameter symbol condition min. typ. max. unit operating temperature under bias ta 0 ? 70 c v cc power supply voltage v cc 3.0 ? 3.6 v input ?h? level v ih 2.4 ? v cc +0.5 ? v input ?l? level v il v cc = 3.0 to 3.6 v ?0.5 ?? ? 0.6 v voltage is relative to vss. ? : vcc+1.5v(max.) when pulse width of overshoot is less than 10ns. ?? : -1.5v(min.) when pulse width of undershoot is less than 10ns. pin capacitance (v cc = 3.3 v, ta = 25c, f = 1 mhz) parameter symbol condition min. typ. max. unit input c in1 v i = 0 v ? ? 10 output c out v o = 0 v ? ? 10 dc c dc v i = 0 v ? ? 200 pf 6/ 15
fedr27v1641l-002-04 MR27V1641L / p2rom electrical characteristics dc characteristics (v cc = 3.3 v 0.3 v, ta = 0 to 70c) parameter symbol condition min. typ. max. unit input leakage current i li v i = 0 to v cc ? ? 10 a output leakage current i lo v o = 0 to v cc ? ? 10 a i ccsc #cs = v cc ? ? 50 a v cc power supply current (standby) i ccst #cs = v ih ? ? 1 ma v cc power supply current (read) i cc1 #cs = v il f=20mhz so=open ? ? 20 ma v cc power supply current (fast-read) i cc1f #cs = v il f=33mhz so=open ? ? 25 ma input ?h? level v ih ? 2.4 ? vcc+0.5 ? v input ?l? level v il ? ?0.5 ?? ? 0.6 v output ?h? level v oh i oh = ?100 a 2.4 ? ? v output ?l? level v ol i ol = 500 a ? ? 0.4 v voltage is relative to vss. ? : vcc+1.5v(max.) when pulse width of overshoot is less than 10ns. ?? : -1.5v(min.) when pulse width of undershoot is less than 10ns. 7/ 15
fedr27v1641l-002-04 MR27V1641L / p2rom ac characteristics fast-read (v cc = 3.3 v 0.3 v, ta = 0 to 70c) parameter symbol condition min. max. unit clock frequency t sclk ? ? 33 mhz clock high time t skh ? 14 ? ns clock low time t skl ? 14 ? ns input signal rise time t r ? ? 3 ns input signal fall time t f ? ? 3 ns #cs lead clock time t csa ? 10 ? ns #cs setup time t cs ? 5 ? ns #cs lag clock time t csb ? 5 ? ns #cs hold time t ch ? 5 ? ns #cs high time t csh ? 80 ? ns si setup time t ds ? 2 ? ns si hold time t dh ? 10 ? ns access time t aa ? ? 14 ns so hold time t doh ? 0 ? ns so floating time t doz ? ? 15 ns read (v cc = 3.3 v 0.3 v, ta = 0 to 70c) parameter symbol condition min. max. unit clock frequency t sclk ? ? 20 mhz clock high time t skh ? 20 ? ns clock low time t skl ? 20 ? ns input signal rise time t r ? ? 3 ns input signal fall time t f ? ? 3 ns #cs lead clock time t csa ? 10 ? ns #cs setup time t cs ? 5 ? ns #cs lag clock time t csb ? 5 ? ns #cs hold time t ch ? 5 ? ns #cs high time t csh ? 80 ? ns si setup time t ds ? 2 ? ns si hold time t dh ? 10 ? ns access time t aa ? ? 14 ns so hold time t doh ? 0 ? ns so floating time t doz ? ? 15 ns measurement conditions output load input signal level 0 v/vcc output input timing reference level 0.3vcc/0.7vcc o utput load 30 pf 30 pf (including scope and jig) output timing reference level 0.5vcc 8/ 15
fedr27v1641l-002-04 MR27V1641L / p2rom timing chart (read cycle) serial data input/output timing incorrect command makes this lsi become and keep standby mode until next #cs rising edge. in standby mode, so pin is high-z. si b it 7 bit 6 b it 5 b it 4 bit 3 b it 2 b it 1 b it 0 si sclk #cs standby timing so hi - z 1 st byte = incorrect code standby standby t doz t skh t skl t csa t r t f # cs so bit 7 bit 6 bit 0 bit 7 bit 0 t cyc t ds t dh t aa t doh t csh t csb bit 6 t cs t ch sclk si 9/ 15
fedr27v1641l-002-04 MR27V1641L / p2rom r ead array timing waveform no te: 1. input data are latched at sclk-rising edge. 2. data-output starts at sclk-falling edge in bit0 of the 4 th byte. si b it 3 bit 2 b it 1 b it 0 bit 7 b it 6 b it 5 b it 4 si sclk #cs so b it 3 bit 2 b it 1 b it 0 b it 7 hi - z (n-1) th data output n th data output (n+1) th data output si b it 1 bit 0 b it 7 bit 6 b it 5 b it 4 bit 3 b it 2 si sclk #cs so hi - z 1 st data output b it 1 b it 0 b it 7 bit 6 b it 5 4 th byte ad3 1 st data output 2 nd data output do e n?t car *note2 #cs si b it 7 bit 6 b it 5 b it 4 bit 3 b it 2 b it 1 b it 0 si sclk so hi - z 1 st byte command b it 7 bit 6 b it 5 b it 4 2 nd byte ad1 b it 3 *note1 10/ 15
fedr27v1641l-002-04 MR27V1641L / p2rom fast read array timing waveform note: 1. input data are latched at sclk-rising edge. 2. data-output starts at sclk-falling edge in bit0 of the 5th byte. si b it 3 bit 2 b it 1 b it 0 bit 7 b it 6 b it 5 b it 4 si sclk #cs so b it 3 bit 2 b it 1 b it 0 b it 7 hi - z (n-1) th data output n th data output (n+1) th data output si b it 1 bit 0 b it 7 bit 6 b it 5 b it 4 bit 3 b it 2 si sclk #cs so hi-z 1 st data output b it 1 b it 0 b it 7 bit 6 b it 5 5 th byte dummy 1 st data output 2 nd data output do e n?t car *note2 #cs si b it 7 bit 6 b it 5 b it 4 bit 3 b it 2 b it 1 b it 0 si sclk so hi-z 1 st byte command b it 7 bit 6 b it 5 b it 4 2 nd byte ad1 b it 3 *note1 11/ 15
fedr27v1641l-002-04 MR27V1641L / p2rom read identification timing waveform note: 1. input data are latched at sclk-rising edge. 2. data-output starts at sclk-falling edge in bit0 of the 1st byte. #cs si b it 7 bit 6 b it 5 b it 4 bit 3 b it 2 b it 1 b it 0 si sclk so hi-z 1 st byte command b b it 7 bit 6 it 5 b it 4 b it 3 manufacturer identification *note1 do e n?t car *note2 si b it 1 bit 0 b it 2 si sclk #cs so device identification b it 1 b it 0 bit15 bit14 bit13 do e n?t car t csb hi - z 12/ 15
fedr27v1641l-002-04 MR27V1641L / p2rom package dimensions (unit: mm) no tes for mounting the surface mount type package the surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact rohm?s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 13/ 15
fedr27v1641l-002-04 MR27V1641L / p2rom revision history page document no. date previous edition current edition description fedr27v1641l-02-01 oct. 28, 2005 ? ? final edition 1 1, 7, 8 1, 7, 8 serial clock (fast-read) 33mhz --> 30mhz 1 1 don?t care (h or l or open) --> don?t care (0v - vcc ) 5 5 device operation added 3. 6 6 pin capacitance c in1 max 12pf --> 10pf c out max 12pf --> 10pf fedr27v1641l-02-02 oct. 31, 2006 8 8 fast-read t skh min. 12ns --> 14ns t skl min. 12ns --> 14ns fast-read & read t r min. 0.1 v/ns --> max. 3ns t f min. 0.1 v/ns --> max. 3ns t aa max. 15ns --> 14ns t doz max. 8ns --> 15ns 2 2 3-byte address (0 to 3fff[h]) --> 3-byte address 3 3 3-byte address (0 to 3fff[h]) --> 3-byte address fedr27v1641l-02-03 mar. 16, 2007 13 13 replaced package diagram fedr27v1641l-002-03 oct. 1, 2008 ? ? changed company logo and name to oki semiconductor fedr27v1641l-002-04 apr. 1, 2009 1, 7, 8 1, 7, 8 serial clock (fast-read) 30mhz --> 33mhz 14/ 15
fedr27v1641l-002-04 MR27V1641L / p2rom 15/15 notice no copying or reproduction of this document, in part or in whole, is permitted without the consent of lapis semiconductor co., ltd. the content specified herein is subject to change for improvement without notice. the content specified herein is for the purpose of introducing lapis semiconductor's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specifications, which can be obtained from lapis semiconductor upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specified in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, lapis semiconductor shall bear no responsibility for such damage. the technical information specified herein is intended only to show the typical functions of and examples of application circuits for the products. lapis semiconductor does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by lapis semiconductor and other parties. lapis semiconductor shall bear no responsibility what soever for any dispute arising from the use of such technical information. the products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation eq uipment, communication devices, electronic appliances and amusement devices). the products specified in this document are not designed to be radiation tolerant. while lapis semiconductor always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any product, such as derating, redundancy, fire control and fail-safe designs. lapis semiconductor shall bear no responsibility whatsoever for your use of any product outside of the pr escribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a me dical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). lapis semiconductor shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specified herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law. copyright 2009 - 2011 lapis semiconductor co., ltd.

▲Up To Search▲

Price & Availability of MR27V1641L

	To Download MR27V1641L Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .